Programming and erase time in a non-volatile, e.g. flash memory can be time consuming. It can typically take 50 us for a location to be programmed while erase of a page of flash memory can take 20 ms. Such program/erase operations will also “lock out” the entire flash memory preventing access to all memory locations. In typical real time embedded applications, such as those in automotive sensors, there is the requirement to service interrupts from sources such as an analog-to-digital converter (ADC) or communications interface such as the LIN bus. The problem arises when such an interrupt arrives during a flash program or erase cycle and the interrupt service routine resides in another part of the flash memory being programmed or erased. The interrupt may be queued for servicing after the flash operation, however this may result in an unacceptable delay in the response to the interrupt. Furthermore, if there are multiple interrupts occurring during the flash operation, some may be ignored and lost. It is possible to reside the time critical interrupt service routines in a separate memory that won't be locked out by program/erase of the main memory. For example this second memory could be another non-volatile memory or a portion of the system SRAM. Provision of a second non-volatile memory is expensive in die area and the user would also be required to manage placement of code in the two memories. SRAM cell sizes are typically up to 10 times larger than a flash memory cell and consequently not an efficient solution, particularly for large interrupt service routines. It also requires careful management of code placement and makes the software programming more difficult.